Drazen Urch
7bd1550195
* Checkpoint * cpu cycle ffi * Rename * mixnode feature * Bundle libcpucycles
102 lines
3.6 KiB
C
102 lines
3.6 KiB
C
// version 20230106
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// public domain
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// djb
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// adapted from supercop/cpucycles/perfevent.c
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// 20230106 djb: read() into int64_t instead of long long
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// 20230106 djb: add comment on RUNNING/ENABLED
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/*
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This code intentionally avoids dividing by the
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PERF_FORMAT_TOTAL_TIME_RUNNING/ENABLED ratio.
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The motivation for that ratio is as follows:
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* A typical CPU has a limited number of performance-monitoring
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counters active at once. For example, there are 8 "programmable"
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counters on Intel Skylake.
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* "perf stat" allows the user to enable more counters. The OS kernel
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periodically (e.g., every millisecond) changes the limited number of
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active hardware counters to a new subset of the enabled counters, and
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"perf stat" reports PERF_FORMAT_TOTAL_TIME_RUNNING/ENABLED for each
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counter, the fraction of time spent with that counter running.
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For long-running programs, dividing the hardware counter by
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RUNNING/ENABLED usually produces a reasonable estimate of what the count
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would have been without competition from other counters.
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A fixable problem with this multiplexing of counters is that the kernel
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appears to simply cycle through counters, so unlucky programs can
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trigger moiré effects. The fix is to select random subsets of counters.
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A more fundamental problem is that cpucycles() has to be usable for
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timing short subroutines, including subroutines so short that the OS has
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no opportunity to change from one selection of counters to another. Say
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RUNNING is 0; should cpucycles() then divide by 0?
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If a caller runs cpucycles(), X(), cpucycles(), X(), etc., and the cycle
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counter happens to be enabled for only 80% of the runs of X(), then
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simply computing the median difference of adjacent cycle counts, with no
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scaling, will filter out the zeros and correctly compute the cost of X.
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Averages won't (without scaling), but averages have other problems, such
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as being heavily influenced by interrupts. (Omitting kernel time from
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perf results does not remove the influence of interrupts on caches.)
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Given the importance of cycle counting, it is better to have cycle
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counters always running. For example, on Skylake, Intel provides the 8
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"programmable" counters on top of a separate cycle counter ("fixed
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counter 1"), so there is no good reason for the kernel to waste a
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"programmable" counter on a cycle counter, there is no good reason to
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turn the cycle counter off, and there is no good reason for RUNNING to
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be below ENABLED for the cycle counter.
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Of course, applications that use just one performance counter at a time
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don't have to worry about kernels getting this wrong, and don't have to
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worry about the possibility of getting noisy or invalid results on CPUs
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that have heavier constraints on the number of simultaneous counters.
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include <unistd.h>
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#include <string.h>
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#include <sys/ioctl.h>
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#include <sys/types.h>
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#include <sys/syscall.h>
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#include <linux/perf_event.h>
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#include "cpucycles_internal.h"
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static int fddev = -1;
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long long ticks(void)
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{
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int64_t result;
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if (read(fddev,&result,sizeof result) < sizeof result) return 0;
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return result;
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}
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long long ticks_setup(void)
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{
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if (fddev == -1) {
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static struct perf_event_attr attr;
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memset(&attr,0,sizeof attr);
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attr.type = PERF_TYPE_HARDWARE;
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attr.size = sizeof(struct perf_event_attr);
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attr.config = PERF_COUNT_HW_CPU_CYCLES;
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attr.disabled = 1;
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attr.exclude_kernel = 1;
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attr.exclude_hv = 1;
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fddev = syscall(__NR_perf_event_open,&attr,0,-1,-1,0);
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if (fddev == -1) return cpucycles_SKIP;
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ioctl(fddev,PERF_EVENT_IOC_RESET,0);
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ioctl(fddev,PERF_EVENT_IOC_ENABLE,0);
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}
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return cpucycles_MAYBECYCLECOUNTER;
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}
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